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555 Type, Timer/Oscillator (Single) IC 100kHz 8-Pdip 296-Ne555p-ND
| Price | $5.00 |
|---|---|
| Min Order | 100 Pieces |
| Availability | In Stock |
| Shipping From | Guangdong, China |
| Popularity | 439 people viewed |
Model NO.:
296-NE555P-ND
Conductive Type:
Unipolar Integrated Circuit
Integration:
GSI
Technics:
Semiconductor IC
shape:
Surface Mount
Trademark:
FT
Transport Package:
Carton
Specification:
10*10*10cm
Origin:
China
HS Code:
85416000
Product Description
Description
These devices are precision timing circuits capable ofproducing accurate time delays or oscillation. In thetime-delay or mono-stable mode of operation,thetimed interval is controlled by a single externalresistor and capacitor network. in the a-stable modeof operation,the frequency and duty cycle can becontrolled independently with two external resistorsand a single external capacitor.
The threshold and trigger levels normally are two-thirds and one-third,respectively,of Vcc. Theselevels can be altered by use of the control-voltageterminal. When the trigger input falls below the triggerlevel, the flip-flop is set, and the output goes high. lfthe trigger input is above the trigger level and thethreshold input is above the threshold level, the flip-flop is reset and the output is low.The reset (RESET)input can override all other inputs and can be used toinitiate a new timing cycle. When RESET goes low,the flip-flop is reset,and the output goes low. Whenthe output is low,a low-impedance path is providedbetween discharge (DISCH) and ground.
The output circuit is capable of sinking or sourcingcurrent up to 200 mA. Operation is specified forsupplies of 5 V to 15 V. With a 5-V supply,outputlevels are compatible with TTL inputs.
The threshold and trigger levels normally are two-thirds and one-third,respectively,of Vcc. Theselevels can be altered by use of the control-voltageterminal. When the trigger input falls below the triggerlevel, the flip-flop is set, and the output goes high. lfthe trigger input is above the trigger level and thethreshold input is above the threshold level, the flip-flop is reset and the output is low.The reset (RESET)input can override all other inputs and can be used toinitiate a new timing cycle. When RESET goes low,the flip-flop is reset,and the output goes low. Whenthe output is low,a low-impedance path is providedbetween discharge (DISCH) and ground.
The output circuit is capable of sinking or sourcingcurrent up to 200 mA. Operation is specified forsupplies of 5 V to 15 V. With a 5-V supply,outputlevels are compatible with TTL inputs.
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